Fast Signed-Digit Multi-operand Decimal Adders
نویسندگان
چکیده
منابع مشابه
Fast Signed-Digit Multi-operand Decimal Adders
Decimal arithmetic is desirable for high precision requirements of many financial, industrial and scientific applications. Furthermore, hardware support for decimal arithmetic has gained momentum with IEEE 7542008, which standardized decimal floating-point. This paper presents a new architecture for two operand and multi-operand signed-digit decimal addition. Signed-digit architectures are adva...
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The research and development of hardware designs for decimal arithmetic is currently going under an intense activity. For most part, the methods proposed to implement fixed and floating point operations are intended for ASIC designs. Thus, a direct mapping or adaptation of these techniques into a FPGA could be far from an optimal solution. Only a few studies have considered new methods more sui...
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ژورنال
عنوان ژورنال: Circuits and Systems
سال: 2011
ISSN: 2153-1285,2153-1293
DOI: 10.4236/cs.2011.23032